A completely new type of detector for Protein Crystallography is being designed in our laboratory. This Digital Pixel Array Detector (DPAD) will offer a substantial (two or three orders of magnitude) improvement over present technology and, for the first time, offer truly frameless readout for high speed time resolved crystallography. The detector consists of a reverse-biased Si diode array bump-bonded to an Application Specific Integrated Circuit (ASIC). The detector pixel pitch is 150 mm. Each pixel processor has a preamplifier, shaper, differential discriminator and a 3 bit pre-scaler optimizing the preams and shaper constants for photon counting, a maximum hit rate of 1 million photon/sec can be realized. For the targeted detector size of 1000 x 1000 pixels, average hit rates of up to 32 billion photon/sec for the whole detector can be achieved. 

An 8 x 8 pixel array X-ray detector prototype has been built and tested. To characterize the analog portion of the readout and the digital characteristics of the detector, the pixel electronics contains only the analog portion of the circuit and is independent of the surrounding cells. The conversion of a photon hit into a pixel address is generated by conventional external electronics. The measured results are very encouraging. The analog electronics demonstrate the capability of processing charge pulses at a rate of 1 x 10⁶ photons/s/pixel, with an energy resolution of 480 eV (FWHM at 5.9 keV) at room temperature. The detector displays uniform digital behavior and has a very low point-spread function. The full-width at 1/100 maximum is less than 1 pixel width (150 mm), which is less than (1/2) that of a CCD and (1/7) that of an imaging plate detector. 

The Digital Pixel Array Detector (DPAD) presently being designed in our laboratory (2) will offer a substantial (two or three orders of magnitude) improvement over present technology and, for the first time, offer truly frameless readout for high speed time resolved crystallography. The detector consists of a reverse-biased Si diode array bump-bonded to an Application Specific Integrated Circuit (ASIC) (Fig. 1). The detector pixel pitch is 150 mm and the charge collection electrode is 100 x 100 mm².

The 8 x 8 prototype detector consists of a monolithic Si diode array that is bump-bonded to the ASIC readout with gold or Indium bumps and reversed biased to +100 V (typical). The 300 mm thick detector has a pixel pitch of 150 mm and a charge collection electrode of 100 x 100 mm². Incident X-rays through direct photon conversion are absorbed in the Si where they create electron/hole pairs. For Si, 3.6 eV is needed on average to create one (e^- -h pair) (ref xx). This measured charge pulse is then amplified, shaped (for noise optimization) and fed to a differential discriminator with an adjustable threshold, where the photon hit is converted to a digital address. Fig. 2 shows the detector and preams connected to the test-processing electronics. The present measurements have been target towards characterization of the front-end analog electronics, and the characterization of Si detector pixel geometry. 

The front-end analog electronics has been designed in the HP 0.8 mm 3 metal process and consists of a preamplifier with a DC reset and a shaping amplifier which forms a RC-(CR)² shaping network. The combined gain of the circuit is 690 mV/fC or 110 mV/1000 e^-, with a measured noise level of 60 e^- (rms) at 5.9 keV (⁵⁵Fe) using a Si detector with a total input capacitance 0.3 pF. The overall power consumption is 50 mW/channel. A complete description of the circuit can be found in Refs. (xx). Table 1 lists some of the more important circuit characteristics. 

Reset time (adjustable) 1 msec.

Power (analog only) 50 mW/channel

Figure 3 shows the histogram of the pulse height output from one of the pixels, when the prototype is irradiated with X-ray from an ⁵⁵Fe source. The full width at half maximum (FWHM) at the 5.89 keV line is found to be 480 eV (rms -60 e^-) and the 6.49 keV K_b line is visible a small hump just to the right of the 5.89 keV. The result is remarkable because the pixel array detector is working at room temperature. Until now, to achieve this kind of precision, a single detector must be cooled down to -30° C. The small plateau at lower energies to the left of the 5.89 keV peak is the result of charge trapping due to an oxide layer on the surface of the detector between the electrodes. Future detectors will be optimized to reduce this trapping effect.

For crystallographic applications the detector must have a large dynamic range and a small point-spread function. This will allow the accurate and simultaneous recording of extremely strong and weak reflections separated by only a few hundred microns. Due to the short reset time of the preamplifier (< 1 ms), the dynamic range of the DPAD is only limited by the total number of scaler data bits, for pixel counting rates (£ 1 MHz).

In order to measure the single pixel performance, a collimator was constructed using stacked tantalum foils in which a 35 mm hole has been laser drilled. The collimator was then attached to a gold rotating anode that is optimized for the Au La (9.7 keV) X-ray. Figure 4 shows a two-dimensional histogram of the X-ray counts of the detector pixels when placed at 5 mm from the collimator. From the plot it is observed that the signal-to-background is three decades at the acquisition time of 1000 s and a discriminator setting of 50 mV. This plot clearly shows the superiority of the new (DPAD) over the more conventional detectors for protein crystallography (phosphor imaging plates (4) and CCD (5) detectors) (See Fig. 5). The full-width at 1/100 maximum (G_0.01) for the DPAD is less than 1 pixel width (150 mm). This value is increased to approximately 350 mm for the CCD and approaches 1000 mm for the imaging plate. Also, the DPAD can integrate digitally over long periods of time (in this case 1000s) without induced background noise due to dark current. As demonstrated here with digital integration, the DPAD has an almost infinite dynamic range, where both the imaging plate and the CCD detector (even when cooled to -50° C) are limited by saturation effects.

A study of the interstitial spacing was conducted to understand the point-spread function and charge sharing that may occur at the gap between neighboring pixels. Figure 6 shows a pixel walk plot of three pixels side by side. To make the measurement, a collimated 35 mm X-ray beam, placed 5 mm from the detector surface was scanned across each pixel in 10 mm steps. Counts from each pixel were then recorded. From the graph it can be seen that the raise (or fall) of the counting rate on the edge of a pixel could be simply due to the shape of the X-ray beam which should have a FWHM of about 35 mm. More importantly is that the plot shows the gaps between pixels behave in a similar manner and are quite symmetric. In addition, Plot A in Fig. 6 clearly shows that the pixel detector does not have an "dead" space. The charge is efficiently collected in all areas of the detector including the area between the charge collection electrodes (i.e. the 50 mm spacing). From plot B in Figure 6, the summing of the counts in pixels 1, 2 and 3 (totals) show little or no "double counts" at the pixel gap. From this, the point-spread function is observed to be near zero with the discriminator setting of 80 mV and a 10 mm step size. This is in agreement with typical diffusion length for this detector geometry which is found to be about 5 mm.

In the future, with better designed pream and with a clever interpolation of the pulse height output of all the pixels hit by one incident electron, the spatial resolution of the Digital Pixel Array Detector for Electron Microscopy could be as good as 50 mm. This kind of detector will allow the determination of 3D structure of macromolecules from single particles electron micrographs, i.e. it will eliminate the need to get large and well diffracted crystals which have been proving to be extremely difficult for some macromolecules (6).

First results of the 8 x 8 Si pixel detector are very encouraging. The results demonstrate that a low-noise pixel array can be constructed and operated at room temperature. The detector analog electronics is capable of processing charge pulses at the designed hit rate greater than 1 x 10⁶ photons/s with an energy resolution of 480 eV (FWHM) at room temperature. Also, the Si pixel detector displayed quite uniform digital behavior. With the low points-pread function it can provide excellent digital information at a 150 mm pitch and with the increasing availability of fine line CMOS technology, pixel sizes less than 100 mm may be feasible soon. A 16 x 16 prototype ASIC is presently being tested which include the compute column architecture. Early results are very promising and have already demonstrated the complete architecture functionality with no loss in the projected photon counting dynamic range. Once the ASIC has been fully characterized a detector hybrid will be made and tested.